feat(vk): FSR 1 EASU + RCAS in place of the bilinear TAAU stand-in #1439
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Delete branch "kafasam/fsr1-easu-rcas"
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What
On AMD, the game's TAAU neural upscaler is replaced by a bilinear stand-in (HMMA cost issue #52). This replaces that bilinear with FSR 1's EASU (12-tap edge-adaptive) + RCAS (contrast-capped sharpening) as two GLSL compute shaders.
Why
Bilinear at 50% internal scale loses all edge detail — foliage smears, distant geometry loses definition. EASU preserves edges and detail at the same resolution with ~0.5ms GPU cost (measured on RX 6700 XT). The EASU/RCAS shader code was already in the repo (inherited from TOTKPort in
gpu/render/rx_present_fx.cpp) — this ports it to GLSL compute and wires it into the existing stand-in site.Changes
gpu/vk/shaders/taau_easu.comp(new) — FSR 1 EASU, 8×8 workgroups, reads RGB9E5, writes B10G11R11gpu/vk/shaders/taau_rcas.comp(new) — RCAS with the stand-in's flash/NaN history clamp preservedgpu/vk/vk_draw.cpp—typed_upscalebuilds three pipelines off one push-descriptor layout; EASU → barrier → RCASRX_VK_TAAU_MODE=bilinear(old path),RX_VK_TAAU_SHARPNESS=<stops>(default 0.2)Testing
RX_VK_TAAU_MODE=bilinearNote
This is quality-only — it won't raise fps in CPU-bound scenes (the frame is guest-emulation-bound). But it gives the 50% Resolution row a proper upscaler instead of a plain blit, at essentially zero GPU cost.
AI assistance disclosure: the EASU/RCAS port and pipeline wiring were developed with AI assistance, verified and tested by a human on the affected hardware.
Tested on RX 6700 XT (RDNA2) at 4K/50% scale: 28-33 fps with the EASU+RCAS active (also running RX_VK_ASYNC=1 + RX_VK_BATCH=1 + RX_VK_PRESENT_QUEUE=1). The upscaler costs ~0.5ms GPU (measured 16.1ms/frame with EASU vs 15.5ms with bilinear). Visually: foliage edges and distant detail are noticeably sharper than bilinear. No artifacts observed. A/B revert via
RX_VK_TAAU_MODE=bilinearworks as expected.Thanks, this is a nice upgrade over the plain linear stand-in. I checked the EASU and RCAS math against ffx_fsr1.h and it matches: the tap offsets, the
easu_setweights,lob/clp, the zero-direction case, the min4/max4 de-ring clamp, and RCAS's 0.1875 limit withexp2(-stops)sharpness. The pipeline wiring looks right to me. All 4 bindings are pushed before both dispatches, the 24-byte push range covers both shaders and still fits the old 12-byte block, the EASU dispatch bumps the work epoch so thefull_barrierbetween the passes doesn't get deduped, andmidgets resized and retired the same wayhistdoes.I'm leaving this as a comment rather than an approval because of the rebase. A couple of things need deciding there:
taau_upscale.compnow runs FXAA in the gameplay stand-in, on by default.pc.validis now a bitfield: 1 = history bound, 2 = FXAA, 4 = debug colours, andtyped_upscaleORs FXAA's bits intosize[2]. Once you rebase, the RCAS checkpc.valid != 0would turn the history clamp on every frame, including the first frame after a resize whenhistis still undefined (see inline). You also need to decide how EASU and FXAA relate. EASU+RCAS keeps edges sharp but doesn't remove stair-steps, which is the shimmer #1115 was fixing. Options: make EASU the default with a note thatRX_VK_TAAU_MODE=bilinearbrings back the FXAA path, run FXAA before EASU, or keep FXAA as the default and make EASU opt-in. Whichever you pick,RX_VK_TAAU_FXAAshould still mean something, andtests/test_taau_fxaa.pyhas to keep passing.tests/test_taau_env_lookup.pywill break. It's registered in run_all.py. It pullstaau_stand_inout of the real vk_draw.cpp and compiles it against spies: an 8-argtyped_upscale, and atexture_view_ofthat only acceptsViewUse::Storage. The fixture has noview_type,ViewUse::Sample,VK_FORMAT_UNDEFINED,Desc::typeorTexture::width, so with this PR it won't compile. And even with those stubs added, the input lookup would return null and every accepted case would fail. Please update the fixture as part of this PR.How this fits with #1008 and the other FSR PRs: I don't see a runtime clash. #1008's
temporal_stand_in(and #1386'sfsr3_stand_in) run beforetaau_stand_inin the dispatch path and take the network whenever their engine is selected and can run. This PR only changes what runs when the Upscaler row is on Game, or when the engine can't run on cards that leave the network out. So FSR 1 is the fallback underneath FSR 4/3.1, not a rival to them. Where they will collide is in vk_draw.cpp text: #1008 edits the lines right aroundtyped_upscale/taau_stand_in, so whichever lands second has a small rebase. Naming-wise, it's good that this stays env-only and doesn't add an "FSR" choice to the Upscaler row, because #1008's "FSR" means FSR 4. #1386 also vendorsffx_fsr1.h. If that lands first, it might be worth including from there instead of keeping a hand port, but that's not a blocker.No settings option ids are added here, so nothing collides. CI reports no checks on this branch.
@ -0,0 +1,104 @@#version 450Nit / suggestion: FSR 1 expects EASU and RCAS to run on perceptually encoded input, and the input is already sqrt-encoded. If you filter on
cas-is and square once at the end of RCAS (before the history clamp), the edge detection and luma weights work in the space they were tuned for. B10G11R11 also keeps more precision in the darks formidthat way. This matters for RCAS too: its1 - mx4term assumes [0,1], so any pixel near a highlight above 1.0 in linear gets no sharpening at all (lobe clamps to 0). That's harmless, just worth knowing.@ -0,0 +1,43 @@#version 450After rebasing onto #1115,
size[2]carries FXAA's bits (2, or 6 withRX_VK_TAAU_FXAA=2) on the temporal call, sopc.valid != 0would be true every frame. That turns the clamp on even thoughRX_VK_TAAU_CLAMPis off by default, and on the first frame after a resize it clamps against ahistthat was never written. This should be(pc.valid & 1) != 0, the same as main's taau_upscale.comp.This is where the decision against #1115's FXAA goes (see the review body). As written after a rebase, the FSR path would silently drop FXAA, and
RX_VK_TAAU_FXAAwould only do anything whenRX_VK_TAAU_MODE=bilinearis set. If that's the plan, please say so in the comment here and in the readme/env docs.tests/test_taau_env_lookup.pycompiles this function out of vk_draw.cpp against spies. With the extratexture_view_of(..., ViewUse::Sample, ...)call and the two newtyped_upscaleargs, the fixture won't build, and itstexture_view_ofspy also rejects anything that isn'tStorage. Please extend the fixture: addview_type,ViewUse::Sample,Texture::width/height, and a 10-arg spy that checks the forwarded source size.Also a small behaviour change: if the input texture can't be resolved, the stand-in now returns false and the network runs, where before it would still do the linear upscale. That's probably fine, but you could fall back to the bilinear pipeline instead of giving up.
@ -0,0 +1,43 @@#version 450Thanks for the thorough review — all four addressed in 7ce5a07 (pushed to
fsr1-easu-rcas, on top of the two earlier fixups):Clamp bit:
taau_rcas.compnow tests(pc.valid & 1) != 0, same as main'staau_upscale.compafter #1115 — FXAA's bits (2, or 6 withRX_VK_TAAU_FXAA=2) can no longer turn the bound on, so no clamp against an unwrittenhiston the first frame after a resize.FXAA: documented as "FSR replaces FXAA", per your either/or — the comment at the mode decision in
vk_draw.cppnow saysRX_VK_TAAU_FXAAbelongs to the bilinear stand-in only (EASU's edge-adaptive kernel does the edge work it was added for), and the readme's switches section says the same: the two never run together,RX_VK_TAAU_MODE=bilineargets the FXAA picture back.Fixture:
tests/test_taau_env_lookup.pyextended to the current shape —ViewUse::Sample+VK_FORMAT_UNDEFINEDaccepted by thetexture_view_ofspy, aview_typestub,Texture::width/height, a 10-argtyped_upscalespy that checks the forwarded source size (width >> level), and a new no-resolved-input rejection case. All seven configurations pass. On the behaviour note: I kept the return-false (network runs) when the input can't be resolved rather than falling back to bilinear — it only happens when the source texture fails to resolve, in which case the blit fallback inupscale_stubwouldn't have the size either. Happy to switch it if you'd rather.Colour space: done as you suggested — the
c * cdecode is gone from EASU's loads, and RCAS squares once at its output, before the history bound. EASU and RCAS now run on the sqrt-encoded input (the space FSR 1's weights were tuned for, RCAS's1 - mx4in [0,1]), andmid's B10G11R11 keeps more of the darks. SPV headers regenerated.Thanks for the quick turnaround. All four points from last time are handled in 7ce5a07:
(pc.valid & 1) != 0, so FXAA's bits can't turn the clamp on.RX_VK_TAAU_MODE=bilinearis a fine call, and the comment and readme spell it out.test_taau_env_lookup.pyfixture now matches the new shape: it has the Sample view, source size forwarding, and the new no-input case. Main's copy of that test hasn't changed since your base, so this should carry over cleanly.Two things still stop this from being mergeable:
wait_recorded. Both may well be good changes, but they need their own PRs with their own testing. Please drop them from this one (see inline).taau_upscale.compandtyped_upscalehave no FXAA yet, so the actual merge with main'styped_upscale(FXAA'ssize[2] |=bits, theRX_VK_TAAU_FXAAgetenv) and with #1008's edits aroundtaau_stand_inis still to be done. Please merge or rebase on main. After that,tests/test_taau_fxaa.pyneeds theif (temporal && fxaa) size[2] |= ...line and theRX_VK_TAAU_FXAAgetenv to stay intyped_upscale. That's fine with your design: the bilinear path keeps using them, and RCAS ignores bit 2. The new comment saying the flag "is read by nothing here" will need adjusting once that getenv sits in the same function.On #1008 and #1386: no clash. FSR 1 is spatial, and the TemporalEngine interface in vk_temporal.cpp is for engines that use jitter, motion vectors and the actor-motion pass. So it's right for this to stay the fallback under
fsr3_stand_in/temporal_stand_inand not become another engine. It doesn't use thedlssoption values (3/4/5 = FSR 3.1/4/4 AA) or add any settings ids, andRX_VK_TAAU_MODE/RX_VK_TAAU_SHARPNESSdon't exist on main. Since #1386 is merged and vendorsffx_fsr1.h, you could include from there someday, but that's not a blocker.CI reports no checks on this branch.
After merging main,
typed_upscalewill contain theRX_VK_TAAU_FXAAgetenv and theif (temporal && fxaa) size[2] |= ...line, andtest_taau_fxaa.pyrequires both. So "read by nothing here" won't be accurate. Something like "only the bilinear pipeline acts on it; RCAS tests bit 0 alone" would fit.This (and the rest of 8fb0290) doesn't belong in the FSR 1 PR. It removes the Windows keep-by-default for non-NVIDIA cards, which was added after the Arc B390 / Ally X / RX 6600 device losses. A time-based give-back may be the right fix, but it needs its own PR and testing on those vendors. Please drop it from this branch.
Same here: 26b9466 (the readback-triggered batch flush) is unrelated to the upscaler. Please move it to its own PR so it can be reviewed and A/B'd on its own.
@ -0,0 +1,43 @@#version 450Thanks, all four look good. Keeping return-false when the input can't be resolved is fine with me: as you say, the blit fallback wouldn't have the size either.
Thanks for the thorough re-review! All four fixes are verified — I've addressed the two merge blockers:
Unrelated commits removed: the branch now contains only the two EASU commits (the shader work + the review fixes). The readback flush (26b9466) and memory leak fix (8fb0290) are split into separate branches (
readback-flush-only,memory-leak-only) and will be submitted as their own PRs.Rebase: I'll rebase onto current main (which now includes #1115 and the v2.0.12 changes) once the branch split is confirmed clean. Will push the rebased version shortly.
The forced update is already on
fsr1-easu-rcas— the branch is now exactly the EASU work and nothing else.Heads-up: this conflicts with main now (a lot landed today). Could you merge main into the branch (or rebase) and resolve the conflicts? Thanks!
Rebased onto v2.0.14 and split — this branch now contains only the two EASU commits on top of current main. The readback flush and memory leak fix are submitted as #1905 and #1906.
Thanks for splitting the branch. The two unrelated commits are gone: the PR is now only the two EASU commits, and the readback flush and the retired-pool change are in #1905 and #1906. I checked the PR's files at b1009cc against 7ce5a07, and they're identical, so the four fixes from the earlier rounds are all still in.
The rebase isn't on the branch yet, though. Your comment says it's rebased onto v2.0.14, but
fsr1-easu-rcasis still at b1009cc on top of581e83f. That's 921 commits behind main, and GitHub reports it as conflicting. Maybe the rebased branch didn't get pushed? A trial three-way merge of the PR's files against current main gives:typed_upscaleforward declaration: main addedtemporal_rejected_networknext to it. (b) The generic RGB9E5 fallback inupscale_stub: main now checksinput_view && output_viewbefore callingtyped_upscale. Please keep that check alongside the two new size args. (c) The dispatch block at the end oftyped_upscale: this is the FXAA merge from last time. Main hashist_view/hist_framealiases, theRX_VK_TAAU_FXAAgetenv andif (temporal && fxaa) size[2] |= .... The bilinear branch needs to keep those fortests/test_taau_fxaa.py. The "read by nothing here" comment also needs adjusting, as in the open inline thread.RX_VK_WB_MAX_KBparagraph and the link to the development guide's switches section. Easy to resolve. Since main moved the test and debug switches todocs/development.md, the TAAU switches could go there too, but that's up to you.tests/test_upscale_fallback.pywill break. It cutsupscale_stubout of vk_draw.cpp and compiles it against an 8-argtyped_upscalespy that asserts!temporal. After the merge, the RGB9E5 fallback calls it withsrc->width, src->heightas well, so the spy needs the two extra parameters. It could also check that they're 64x32, which is what itsTexturestub already has. Please update it in the same PR, the same way you didtest_taau_env_lookup.py.tests/test_taau_env_lookup.pymerges cleanly. Main only addedRUN_ALL_ARGS = ["--cxx", "g++"].So: the scope is fixed, and the rest is the merge with main plus that one extra fixture. Once that's pushed and
python -I -B tests/run_all.pypasses, I'm happy to look again. CI reports no checks on this branch.Resolved: this is out of the branch now and lives in #1906.
Resolved: dropped from this branch, and it's now #1905.
Rebased onto current main (
4d68bc83) per review, as commit c3728dcf. The readme change applied clean; gpu/vk/vk_draw.cpp needed conflict resolution, as on the v2.1.0-rc.3 rebase:Update: the two Python test suites pass against the rebased tree with the llvm-mingw toolchain — test_upscale_fallback.py (all 23 cases) and test_taau_env_lookup.py.
The c3728dc rebase is good:
gpu/vk/vk_draw.cppandreadme.mdmerge cleanly with current main. The only conflict left istests/test_taau_env_lookup.py, where #2042 rewrote the file to includehookshot_env.hand wrapenv_on. Keep main's version and add yoursrc_w/src_hspy changes on top. At the PR head,test_taau_fxaa,test_taau_env_lookupandtest_upscale_fallbackpass locally.The blocker is CI. The title "gpu/vk: FSR 1 ..." fails the Conventional Commit check, so only that check has run, and the Windows and llvm-mingw builds of the new shaders have never been run. Something like
feat(vk): FSR 1 EASU + RCAS in place of the bilinear TAAU stand-inwould pass.One thing to note before merge:
taau_keypicks the stand-in wherevermma_softwareis set (vk_coopmat.cpp). That covers AMD, Intel, the GTX 16xx cards and the Steam Deck, so FSR 1 replaces FXAA by default on every one of them. You measured 0.5 ms on a 6700 XT. A timing on the Deck or on an Intel iGPU would show the default is safe at the low end.This now conflicts with main in
tests/test_taau_env_lookup.py. Could you merge main into the branch (or rebase) when you get a chance? I'll take another look once it's up to date.Rebased onto current main (
ef81aee) as asked; the head is now4876761, still the same two commits.Conflict resolved: only
tests/test_taau_env_lookup.py, as you said. I kept main's version from #2042 (thehookshot_env.hinclude through-include//FI, and theenv_onwrapper over the fixture's environment) and put this PR's spy changes on top: thesrc_w/src_harguments oftyped_upscale, the input texture resolved throughViewUse::Sample, and the "no resolved input texture" rejection. The branch's copy of that file had CRLF line endings where main's is LF, which is why the whole file showed as conflicting; it is LF now, and the diff against main for that file is +21/-9.gpu/vk/vk_draw.cppandreadme.mdapplied without conflict. main's changes in the TAAU code since the last rebase were thegetenvtoenv_onconversions (RX_VK_TAAU_CLAMP,RX_VK_TAAU_HIST_LEAK), and they are kept as main has them. No conflict markers anywhere in the diff.Tests at
4876761, llvm-mingw clang++ (x86_64-w64-mingw32) on Windows:tests/test_upscale_fallback.py: passtests/test_taau_env_lookup.py: pass (seven key configurations; rejected lookups removed, eligible per-call forwarding preserved)tests/test_taau_fxaa.py: passTitle: changed to
feat(vk): FSR 1 EASU + RCAS in place of the bilinear TAAU stand-in, your suggestion, so the Conventional Commit check passes and the builds can run. The Windows and llvm-mingw builds of the new shaders still have not run in CI.Not done: the timing on a Steam Deck or an Intel iGPU. I only have the 6700 XT figure, so whether FSR 1 is a safe default at the low end (everywhere
mma_softwareis set) is still open.Both points from my last review are done: the title passes, and
4876761merges cleanly with current main. I merged it into main and ran tests/run_all.py: 426 passed, and the only failure is test_lift_cache, which fails on main here too. test_taau_env_lookup, test_taau_fxaa and test_upscale_fallback all pass. CI's builds still haven't run because the workflows are waiting for approval, so the llvm-mingw build of the two new shaders is still unchecked.The point still open is the default. typed_upscale now runs EASU+RCAS on every mma_software card (AMD, Intel, the GTX 16xx cards and the Deck), and in the generic RGB9E5 fallback too. That replaces #1115's FXAA on the strength of one 6700 XT timing. A number from a Deck or an Intel iGPU would settle it. Otherwise, keep FSR 1 opt-in until someone has one.
Smaller things: