fix(vk): handle RDNA 1 wave32 and wave64 shader stages #1657
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MagicBeanDev/Hookshot!1657
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Delete branch "fix/rdna1-wave32-wave64"
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Unpinned SPIR-V 1.6 stages may use a subgroup wider than the device's default, so the translator must use the supported maximum to preserve 32-lane guest warp boundaries. Quad-only fragment operations must also keep their existing path instead of inheriting AMD's fragment shuffle broadcast workaround.
Rebased onto
f8efe057(currentmain). Main has since incorporated the stage-specific profiles and AMD fragment workaround from #1507; this PR preserves that implementation and carries only the remaining changes:subgroup_maxfor the unpinned base profile, including devices whose default is 32 but maximum is 64. Existing compute and graphics stage pinning stays intact.RX_VK_WARP64in the cache stamp, since an explicit override can select a different graphics profile even when the base width is unchanged. This invalidates incompatible translated-program caches.RUN_ALL_ARGSdeclarations, with 11 isolated device/override scenarios. Preserve the existing AMD fragment test.The subgroup rule follows the Vulkan specification. Device selection remains capability-based, covering the RX 5500 XT / RX 5600 XT / RX 5700 XT family without a name allowlist.
Validation for this rebase:
f8efe057with the same toolchain: FPX, recorder sync, display startup fixture, precompile compute guard, NUP symlink privileges and missing zstd for bake_ds.--stricton final commit363038d: 4 passed, 0 failed, 0 skipped.git diff --checkpassed. The six rebase conflicts are resolved. No new game binary or hardware run is claimed for this rebased revision.Related: #1001; also relevant to the broader #996, #1000 and #995 trackers, without claiming to resolve them in full. Memory retention, pipeline scheduling, resolution, image quality and frame generation are outside this PR.
Historical hardware context: an earlier local experimental build showed 20 FPS in Link's house on the RX 5500 XT at 2560x1440, 100% scale, without upscaling or frame generation. The screenshot below is not a benchmark of this rebased revision. RX 5600 XT, RX 5700 XT and Linux/RADV still need hardware testing.
Credits: follows Robin Irfan's AMD warp work and butterfly/quad correction, including the Lichii #273 fragment workaround credited to jonmakegames. This PR carries only the remaining subgroup/fragment pieces needed on current main.
Looks good. Read through the profile plumbing: make_profile(stage) now takes the stage, the old static profile() has no remaining callers, and every EmitSPIRV call site passes the stage that matches the pipeline stage it ends up in (compute for the task/mesh fallbacks). Using the same sg32_stages mask for the profile and the pipeline pin keeps the two in step, and on 32-lane-only devices (NVIDIA) the result is unchanged. The disk stamp now includes subgroup width, pinned stages and the workaround flag, so old caches won't be reused. Quad broadcast keeping the old path is consistent with the description, and the test is registered in run_all.py.
Nit: the new line in EmitShuffleIndex and the ternary in EmitShuffleButterfly run past the file's usual line width.
No CI ran on the branch, and the RX 5600 XT / 5700 XT / RADV runs are still untested, as the description says. Nothing here blocks merging.
Looks good. Read through the profile plumbing: make_profile(stage) now takes the stage, the old static profile() has no remaining callers, and every EmitSPIRV call site passes the stage that matches the pipeline stage it ends up in (compute for the task/mesh fallbacks). Using the same sg32_stages mask for the profile and the pipeline pin keeps the two in step, and on 32-lane-only devices (NVIDIA) the result is unchanged. The disk stamp now includes subgroup width, pinned stages and the workaround flag, so old caches won't be reused. Quad broadcast keeping the old path is consistent with the description, and the test is registered in run_all.py.
Nit: the new line in EmitShuffleIndex and the ternary in EmitShuffleButterfly run past the file's usual line width.
No CI ran on the branch, and the RX 5600 XT / 5700 XT / RADV runs are still untested, as the description says. Nothing here blocks merging.
Heads-up: this conflicts with main now (a lot landed today). Could you merge main into the branch (or rebase) and resolve the conflicts? Thanks!
@hckrman101 rebased